The present invention relates generally to semiconductors and, more particularly, to a structure and method of creating a moisture barrier edge seal around an entire circumference of a whole wafer.
Microelectronic integrated circuits may connect devices together using copper interconnect “wires” formed in layers of insulator films. Wiring levels may use insulator films which may be permeable to water vapor. Water vapor will degrade the performance of the permeable insulator layers and possibly corrode the metal structures embedded within the permeable insulator layers. Because microelectronic devices are patterned at the chip level, a moisture barrier is typically formed around the lower levels of each individual chip during manufacturing.
Although conventional chip sealing methods may work to protect individual chips, they may not provide sufficient protection when the whole wafer itself is contemplated as one large interconnected circuit composed of a plurality of individual chips in a product region. When the objective is to produce a whole wafer wherein a plurality of separate chips are intentionally interconnected by design, a conventional chip sealing method does not suffice to protect the wafer from moisture because on a whole wafer each layer reaches the edge of the wafer without a sufficient moisture barrier. Therefore, a need to provide a whole wafer edge seal is needed.